active	[]
free registers	[P0, P1]
assignments	vreg interval location R10 Range(16, 36) R11 Range(16, 20) R12 Range(20, 36) R13 Range(20, 30) R14 Range(28, 34) R15 Range(30, 34) R16 Range(36, 38)

	idx	insn
→	16	B1(R10, R11):
	18	jump →B2($1, R11)
	20	B2(R12, R13):
	22	cmp R13, $1
	24	blt iftrue: →B4, iffalse: →B3
	26	B3:
	28	R14 = mul R12, R13
	30	R15 = sub R13, $1
	32	jump →B2(R14, R15)
	34	B4:
	36	R16 = add R10, R12
	38	ret R16

active	[Range(16, 36)]
free registers	[P1]
assignments	vreg interval location R10 Range(16, 36) P0 R11 Range(16, 20) R12 Range(20, 36) R13 Range(20, 30) R14 Range(28, 34) R15 Range(30, 34) R16 Range(36, 38)

	idx	insn
→	16	B1(R10, R11):
	18	jump →B2($1, R11)
	20	B2(R12, R13):
	22	cmp R13, $1
	24	blt iftrue: →B4, iffalse: →B3
	26	B3:
	28	R14 = mul R12, R13
	30	R15 = sub R13, $1
	32	jump →B2(R14, R15)
	34	B4:
	36	R16 = add R10, R12
	38	ret R16

active	[Range(16, 20), Range(16, 36)]
free registers	[]
assignments	vreg interval location R10 Range(16, 36) P0 R11 Range(16, 20) P1 R12 Range(20, 36) R13 Range(20, 30) R14 Range(28, 34) R15 Range(30, 34) R16 Range(36, 38)

	idx	insn
→	16	B1(R10, R11):
	18	jump →B2($1, R11)
	20	B2(R12, R13):
	22	cmp R13, $1
	24	blt iftrue: →B4, iffalse: →B3
	26	B3:
	28	R14 = mul R12, R13
	30	R15 = sub R13, $1
	32	jump →B2(R14, R15)
	34	B4:
	36	R16 = add R10, R12
	38	ret R16

active	[Range(16, 36), Range(20, 36)]
free registers	[]
assignments	vreg interval location R10 Range(16, 36) P0 R11 Range(16, 20) P1 R12 Range(20, 36) P1 R13 Range(20, 30) R14 Range(28, 34) R15 Range(30, 34) R16 Range(36, 38)

	idx	insn
	16	B1(R10, R11):
	18	jump →B2($1, R11)
→	20	B2(R12, R13):
	22	cmp R13, $1
	24	blt iftrue: →B4, iffalse: →B3
	26	B3:
	28	R14 = mul R12, R13
	30	R15 = sub R13, $1
	32	jump →B2(R14, R15)
	34	B4:
	36	R16 = add R10, R12
	38	ret R16

active	[Range(20, 30), Range(20, 36)]
free registers	[]
assignments	vreg interval location R10 Range(16, 36) Stack[0] R11 Range(16, 20) P1 R12 Range(20, 36) P1 R13 Range(20, 30) P0 R14 Range(28, 34) R15 Range(30, 34) R16 Range(36, 38)

	idx	insn
	16	B1(R10, R11):
	18	jump →B2($1, R11)
→	20	B2(R12, R13):
	22	cmp R13, $1
	24	blt iftrue: →B4, iffalse: →B3
	26	B3:
	28	R14 = mul R12, R13
	30	R15 = sub R13, $1
	32	jump →B2(R14, R15)
	34	B4:
	36	R16 = add R10, R12
	38	ret R16

active	[Range(20, 30), Range(28, 34)]
free registers	[]
assignments	vreg interval location R10 Range(16, 36) Stack[0] R11 Range(16, 20) P1 R12 Range(20, 36) Stack[1] R13 Range(20, 30) P0 R14 Range(28, 34) P1 R15 Range(30, 34) R16 Range(36, 38)

	idx	insn
	16	B1(R10, R11):
	18	jump →B2($1, R11)
	20	B2(R12, R13):
	22	cmp R13, $1
	24	blt iftrue: →B4, iffalse: →B3
	26	B3:
→	28	R14 = mul R12, R13
	30	R15 = sub R13, $1
	32	jump →B2(R14, R15)
	34	B4:
	36	R16 = add R10, R12
	38	ret R16

active	[Range(28, 34), Range(30, 34)]
free registers	[]
assignments	vreg interval location R10 Range(16, 36) Stack[0] R11 Range(16, 20) P1 R12 Range(20, 36) Stack[1] R13 Range(20, 30) P0 R14 Range(28, 34) P1 R15 Range(30, 34) P0 R16 Range(36, 38)

	idx	insn
	16	B1(R10, R11):
	18	jump →B2($1, R11)
	20	B2(R12, R13):
	22	cmp R13, $1
	24	blt iftrue: →B4, iffalse: →B3
	26	B3:
	28	R14 = mul R12, R13
→	30	R15 = sub R13, $1
	32	jump →B2(R14, R15)
	34	B4:
	36	R16 = add R10, R12
	38	ret R16

active	[Range(36, 38)]
free registers	[P1]
assignments	vreg interval location R10 Range(16, 36) Stack[0] R11 Range(16, 20) P1 R12 Range(20, 36) Stack[1] R13 Range(20, 30) P0 R14 Range(28, 34) P1 R15 Range(30, 34) P0 R16 Range(36, 38) P0

	idx	insn
	16	B1(R10, R11):
	18	jump →B2($1, R11)
	20	B2(R12, R13):
	22	cmp R13, $1
	24	blt iftrue: →B4, iffalse: →B3
	26	B3:
	28	R14 = mul R12, R13
	30	R15 = sub R13, $1
	32	jump →B2(R14, R15)
	34	B4:
→	36	R16 = add R10, R12
	38	ret R16